For Nanoscale Chip Wiring, it’s All About Flowing Copper
Cleantech, Applied
If you were to slice up a microchip and take a look (you’d need a really powerful microscope, I’m afraid) you would see what looks like a nanoscale layer cake.
All the active circuit elements – transistors, memory cells etc. – are on the bottom. The other 90% of the chip is a maze of tiny copper wires, which we call interconnects.
The history of chip development is all about shrinking circuit features. When the transistors shrink, so must the interconnects. Today, the smallest interconnects can be fewer than 200 atoms across.
Interconnects are made by filling molds of insulating material with copper. At these miniscule dimensions, completely filling these features becomes very difficult. If it’s not done just right, bubbles of vacuum, called voids, can be formed, which can create a short circuit. In the most advanced device designs, even one void can render the entire chip useless.
Applied Materials unveiled the Applied Endura® Amber™ physical vapor deposition system today, which aims to banish interconnect voids forever. The new Amber system takes advantage of capillary action to pull heat-softened copper down into even the tiniest structures.
In this video, I take a quick look at how the interconnect fabrication process is done and then demonstrate how our revolutionary copper reflow technology works.
Original Article on Cleantech, Applied
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