Energy Efficient Chips as Mini Internets

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The speed of computer chips isn’t getting faster, so in order to keep computational power of chips increasing additional processing units or ‘cores’ are being given to the chips by the chipmakers. A typical chip used presently has a maximum of eight cores, which communicate over a single bundle of wires, generally called a bus. A bus allows only one pair to talk at a time being a serious drawback for computing future, in which chips with hundreds or may be thousands of cores are envisioned by the electrical engineers.

An associate professor of electrical engineering and computer science at MIT, Li Shiuan Peh, looks forward to make cores communicate just as computers connected to Internet do, by transmitting the information bundled into packets. Every core owns a router that sends packet to various paths depending entirely upon the network conditions. So far count of core has been low enough enabling the bus to handle the extra load of communication but it’s changing and after all buses also have a limit. The other thing is that the buses consume lots of power as they try at the same time to drive long wires to eight or ten cores.

As a solution two techniques have been developed by Peh and her colleagues. Firstly, called ‘virtual bypassing,’ is the one in which an advanced signal is sent by the router to the next one so that it can preset its switch increasing the speed of packet on without additional computation. The other technique is called low swing signaling, in which digital data consisting zeroes and ones is transmitted over communications channels as low and high voltages. A circuit has also been developed by a PhD student, Sunghyun Park, Joseph. F. and Nancy P. Keithley, professor of Electrical Engineering, which reduces swing between low and high voltages from one volt to 300 millivolts. When the circuit was combined with low swing signaling and virtual bypassing, 38 percent less energy was consumed by the test chip of researchers as compared to packet switched test chips.

Via: MIT